It seems here that Google provides the core IP, and that Synaptic packages this (and probably other related IP blocks) block that can be used to build a SoC. As of now there are no chips announced. So it will be some years before we as software/electronics engineers get to play with it.
The architecture seems to be RISC-V array with standard RVV vector instruction set. That is a quite familiar environment for software developers compared to custom systolic arrays.
I think they announced 5 chips[0] in the SL2610 product line[1] today. It appears they're combining 1-2 ARM Cortex-A55 with a Cortex-M52 and a 1 TOPS NPU. Somewhat more complete data sheet here[2] (which is still a bit anemic, IMHO) There are photos of the devkit hardware that will be offered at [6] if you scroll up a little bit.
The original Google Coral lineup offered a 4TOPS accelerator back in 2018-2020.[3][4]
The original (4 TOPS) Coral used ~1 watt while this new Coral TPU is designed for 10mW/0.5 TOPS.[5] That power budget fits well alongside low power MCU's.
It doesn't appear to include any hardware accelerated video encoding[6] for H264/etc, which was also a massive limitation of the original google coral (improved slightly in the Dev Board Mini). There's a lot of documentation on consuming WebRTC content, and while streaming out is mentioned ... any encoding would have to be performed on one of the A55 cores at dubious performance levels. The RK3588, for example, includes a VPU for hardware accelerated video encoding (H264/HEVC encoding @ 8k30fps).
Looking at the state of the original Coral TPU (which was basically abandoned, just like regular other Google stuff), would make me very wary to use this is a long term product.
Also seems the core hardware was open-sourced? Github: https://github.com/google-coral/coralnpu
It seems here that Google provides the core IP, and that Synaptic packages this (and probably other related IP blocks) block that can be used to build a SoC. As of now there are no chips announced. So it will be some years before we as software/electronics engineers get to play with it.
The architecture seems to be RISC-V array with standard RVV vector instruction set. That is a quite familiar environment for software developers compared to custom systolic arrays.
I think they announced 5 chips[0] in the SL2610 product line[1] today. It appears they're combining 1-2 ARM Cortex-A55 with a Cortex-M52 and a 1 TOPS NPU. Somewhat more complete data sheet here[2] (which is still a bit anemic, IMHO) There are photos of the devkit hardware that will be offered at [6] if you scroll up a little bit.
The original Google Coral lineup offered a 4TOPS accelerator back in 2018-2020.[3][4]
The original (4 TOPS) Coral used ~1 watt while this new Coral TPU is designed for 10mW/0.5 TOPS.[5] That power budget fits well alongside low power MCU's.
It doesn't appear to include any hardware accelerated video encoding[6] for H264/etc, which was also a massive limitation of the original google coral (improved slightly in the Dev Board Mini). There's a lot of documentation on consuming WebRTC content, and while streaming out is mentioned ... any encoding would have to be performed on one of the A55 cores at dubious performance levels. The RK3588, for example, includes a VPU for hardware accelerated video encoding (H264/HEVC encoding @ 8k30fps).
0: https://cdn.bfldr.com/ZU41R0OK/at/tjm5s8hrmz5mgqrjtsrc5c4/sl...
1: https://www.synaptics.com/products/embedded-processors/sl261...
2: https://cdn.bfldr.com/ZU41R0OK/at/ks4thp8bw9n3bt2ktms3k34s/s...
3: https://abopen.com/news/google-launches-coral-edge-tpu-devel...
4: https://developers.googleblog.com/en/new-coral-products-for-...
5: https://developers.google.com/coral/guides/power
6: https://synaptics-astra.github.io/doc/v/latest/linux/index.h...
Looking at the state of the original Coral TPU (which was basically abandoned, just like regular other Google stuff), would make me very wary to use this is a long term product.
Interesting that in 2025 they only provide C compiler support as building tool, who cares about security in AI systems.
This is blatantly false. There are MLIR based backhands for other languages. This is explicitly mentioned on the landing page at https://developers.googleblog.com/en/introducing-coral-npu-a....
Please language troll somewhere else.
is hardware still squirrelled away behind mega paywalls of one or two companies holding all the EDA software?
someone at ycombinator should create a "github for silicon IP" company. that would be awesome.